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Example Wideband Signal Processing/Recording
 

 
The trend in RF systems is to digitize and process signals at the earliest possible point in the signal chain. This means digitizing signals at the fastest possible rate and highest resolution (number of bits) that can be achieved. Therefore the benefits of digital domain processing can be gained across a wider portion of the signal bandwidth of interest. In a SigInt application, this translates into more effective processing of more communication channels simultaneously.

FPGAs are increasingly employed very close to the analog to digital converter portion of a system in order to enable early stage signal processing to be carried out on data which may have been sampled at high clock rates. Operations such as decimation and channelization of the sampled data might be carried out at this stage.

This is a good point in a system to insert real time data recording firmware into the FPGA. Direct access to the raw sampled data is available and it is usually most useful to capture raw data, prior to any signal processing operations.

Data recording functionality is implemented in the FPGA, using on-chip embedded processor resources. This allows software to be written for the complex elements of the data recorder functionality such as the filing system management. Two of the on chip MGT resources are also utilized to implement the physical layer of the fiber channel interface.

Commercial A to D cards are used to operate at sample rates in excess of 2GHz with 10 or 12 bit wide data samples which means that a real time data storage system would cope with data bandwidths of 3 Gbytes/s.

Employing multiple disk arrays and disk interfaces in parallel is the obvious way to add additional recording bandwidth to a system.  FPGA implementation of the disk interface offers the possibility to implement multiple instantiations of the interface in a single chip. Even further scaling may be possible if multiple FPGAs are available.

For a detailed look at this application click to the article at COTSjournal online.
 
 
     
 RT Data Recording In Sensor Processing
 
Recording systems using arrays of hard disks have in the past been considered for real time, high volume data storage applications. Data recording for military applications offers some specific challenges:

·    Sensors (e.g. RF antennas or sensors) generate very high bandwidths of digital data. Data rates in excess of 3GBytes/s from a single sensor channel are not uncommon.

·    Embedded applications, especially those within rugged military operating environments, may be constrained in terms of size weight and volume.

In the past the solution to the high data bandwidth requirements of military data storage applications was to employ multiple parallel sets of disk arrays and interface cards to achieve the required aggregate bandwidth.  However, this solution may not be compatible with the size, weight and volume constraints of many embedded applications. And today FPGAs offer an alternative.
 
 
State of the FPGAs
 

State of the art FPGAs include a rich set of hardware resources on the chip which can be used to implement disk interfaces such as Fibre Channel. The Xilinx Virtex 2 Pro and Virtex 5 FPGA families include devices containing multiple on-chip Multi Gigabit Transceiver (MGT) resources which can be employed to implement the physical layer of disk interfaces such as Fibre Channel.

Todayjazzstore it is possible to utilize the on-chip resources in an FPGA to implement a complete real time data recorder application using firmware within the chip. The FPGA can be interfaced directly to one or more disk arrays. Tekmicro has developed an advanced JazzStore SOC system which can be scaled for very high recording bandwidths while still achieving a compact, single chip solution.
 
 
TEK Microsystems Solutions
 
Real time data recording is a common requirement in many military embedded sensor processing. Such applications present challenges for a data recording application as data bandwidths can be high and size constraints can limit the opportunity to use additional hardware.

FPGAs are increasingly utilized in military embedded signal processing systems to enable processing of wideband sampled data. FPGAs also provide a rich set of on chip resources that can be used to implement interfaces to hard disk systems via standard protocols such as SCSI, Fibre Channel and Serial ATA.

Real time data recording functionality can be implemented in a system by adding firmware to the FPGA and connecting it directly to a hard disk array. The FPGA provides a very compact, system-on-chip recording solution. Or, by scaling the firmware across multiple FPGAs, it is possible to achieve an order of magnitude increase in recording bandwidth.

The TEK Microsystems' JazzSore SOC technology offers an FPGA implementation of a Fibre Channel based data recording system. This technology complements the TEK Microsystems' Jazz and Quixilica FPGA based products, providing real time data record / playback functionality for a wide range of demanding real time applications.

For more info on JazzStore SOC
 

Data Recording from Tekmicro
 
harrisThis Tekmicro-designed application specific system receives broadband sampled data at 1.6 G samples/sec and store it in 12 RAID arrays. 

The VXS system is configured with a single Neptune 2 A/D board and one Callisto board providing exceptionally high performance data storage capability.  This results in a smaller, less expensive, less power-hungry system than has been available previously.

 The Tekmicro system uses the A/D capabilities of the Neptune 2 to receive the sampled data which is then sent to the Callisto VXS switch card.  Callisto includes five FPGAs and 12 front panel fiber ports. In this application, the FPGAs are programmed to each include two FibreChannel cores that take advantage of the PowerPC 405 processors in the Xilinx Virtex II Pro FPGA. The data is then streamed out through Callisto's 12 FiberChannel ports to 12 RAID disk arrays for storage.

 For more info on TEK Microsystems Data Recording